1. Field of the Invention
The present invention relates to mixed signal controller circuits and systems for use in the electric power management industry, and which, via different voltage/current buffer devices, is capable of performing any of a variety of control applications, including as a pulse width modulation (“PWM”) controller, power factor correction (“PFC”) circuit, silicon controlled rectifier (“SCR”) or thyristor, zero-voltage drive (“ZVD”) circuit, AC/DC boost converter, battery charger, motor RPM controller, timer or clock, light intensity controller, temperature range controller, pressure controller, sensing/monitoring/warning system, or analog logic circuit.
The invention, hereinafter referred to as “NEWSYS”, provides a reliable new system with a low-cost ultra-versatile mixed signal circuit which is capable of reducing the size and number of parts used in many of the power management industry's existing circuit applications or products, while at the same time improving the most significant power conversion circuits' performance features, such as: Efficiency (“Eff”), Power Factor (“PF”), Total Harmonic Distortion (“THD”), Reliability (“Rel”), and, very importantly, significantly reduces the total circuit solution cost per unit.
2. Introduction
2.1 Switching Vs. Linear Control Systems
During the last 20 years, the Pulse Width Modulation Controlling Systems (“PWMCS”) are more and more used in the process of transferring the electrical energy from a generator to a load (i.e., power management), because of their higher efficiency in respect to the classic linear controlling systems (“LCS”).
While the LCS are losing (dissipating) 50% or more of the inputted electrical energy as heat, in order to provide a graduate increasing power to a specific load (such as: bulbs, motors, heaters, batteries recharging systems, electronic equipment, etc.), the PWMCS are capable of transferring the same energy, in high frequency small increments (i.e., square wave pulses) that may improve the efficiency ratio up to 99%, because the PWMCS act not as electronic potentiometers or rheostats but as low power dissipation switches.
Note: The amount of power (“Psw”) dissipated on a switch (Psw=Isw×Vsw) is supposed to be, always, “Near Zero” (or negligible in respect to the power transferred to the load) because in both situations, “Switch ON” or “Switch OFF”, at least one of the power's two parameters, current (“Isw”) or voltage (“Vsw”) amount, is “Near Zero”. In other words, when a switch is in its “ON” state, the current (“Isw”) parameter reaches its maximum value, however the voltage (“Vsw”) parameter across the switch is near zero (considering the switch's electrical resistance is very small or negligible in respect to the rest of the circuit's resistance) and vice versa, when the switch is in “OFF” state, the voltage (“Vsw”) parameter reaches its maximum value however, the current (“Isw”) amount is near zero.
Because of that, the classic linear systems, including passive circuits (i.e., potentiometers, rheostats, ballast resistors/coils), operational amplifiers or linear transistors/buffers, are now more and more being replaced by switching systems, comprising high speed comparators and logic circuits (i.e., mixed signal systems) that are capable of reducing considerably the controlling devices' internal dissipation. Switching and digital (logic) electronic systems are obviously more efficient than linear (analog) ones because of their “0/1” (switching ON/OFF) “discrete” mode of operations. However, the logic controlling systems are more sophisticated, expensive and “noisy” than the analog ones (i.e., square wave signals introduce high frequency harmonics that have to be attenuated with “EMI” or “low pass” filters).
2.2 Mixed Signal Systems
In the real life environment, the amplitude variations of light, temperature, humidity, pressure, sound/noise, etc., are not discrete (“everything=1”, “nothing=0”) but, more or less linear, requesting linear transducers for monitoring/controlling purposes. Because of that, the modern technology promotes, more and more, mixed signal systems (including analog and logic sub-systems) devices that are able to optimize the sensing and controlling accuracy, under low manufacturing cost.
During the last 20 years, mixed signal devices such as timers/clocks, PWM and PFC controller ICs have provided the optimal cost/performances compromise in the electronic industry, being less dissipative than the analog/linear devices, and simultaneously, less sophisticated and expensive than the digital/logic devices.
2.3 Power Management's Main Parameters
In the process of transferring AC electrical power from a generator to a load, the most important parameters the designers have to consider, are: efficiency (“Eff”), power factor (“PF”), current total harmonic distortions (“A.THD”), reliability (“Rel”) and cost per unit (“C/U”).
2.3.1 Efficiency (Eff)
The Eff parameter reflects the output power versus input power ratio and its ideal amount is 100%, when the entire electrical energy is transferred from a generator to a load. In real life, an electrical device having Eff>90% could be considered a “very efficient” one.
For any load (except heaters) supplied by a sine-wave voltage generator, the Eff parameter amount's difference from 100% typically represents the ratio of electrical energy lost to unnecessary overheating inside of the electrical device.
The classic electrical Incandescent bulb (i.e., Edison type) is very inefficient, transferring only about 1% of the imputed electrical energy to light output. Therefore, engineers are doing significant efforts replaced with more efficient light sources, such as halogen, sodium and fluorescent bulbs. Recently, the ultra-bright white LED bulbs have been proved as the most efficient light sources, and now, the US Department of Energy offers prizes up to $10M to the first manufacturer capable to build an 11 W LED Bulb that generates the same light as a 60 W Incandescent Bulb.
It is true that the fluorescent and LED lamps are more efficient (less loss in heat). However these lamps are more expensive, first because of their higher manufacturing complexity and second because of their requested ballast circuit, attached for current limitation and power factor correction purposes.
Bipolar transistors are more efficient working in switching mode, however, their overheating limits their use down to the low power range. MOSFETs and IGBTs are the most efficient buffers at low and medium power range. Thyristors (i.e., silicon control rectifiers, “SCR”) are the most efficient devices recommended for very high power conversion (i.e., hundreds of kW).
2.3.2 The Power Factor (PF)
The PF parameter reflects the real input power (i.e., the integral of “V×I” equation) versus the apparent input power (“Vrms×Irms” equation) ratio, and its ideal amount is 1, when the load current graph is identical in shape and phase (i.e., sine-wave) with the voltage graph.
PF=1 is theoretically impossible (i.e., even wires have low “reactive” (i.e., inductive L and capacitive C) components. However, there are already state-of-the-art PFC circuits capable of reaching PF=0.999. In real life, most of the existing electronic devices (i.e., computers, monitors, TVs, printers) typically have PF≈0.65, and therefore, any devices having PF>0.90 should be considered “good” products.
For any load supplied by a sine-wave voltage generator, the PF parameter amount's difference from 1 (and multiplied by 100) typically represents the ratio of electrical energy lost to unnecessary overheating outside of the electrical device, in an electrical utility provider's transformers and wiring system.
2.3.3 The Current Harmonic Distortions (A.THD)
The A.THD parameter reflects the level of electrical noise (measured in %) generated by a specific device or system and its ideal amount is 0% (when PF=1, only).
Usually, as low is the PF parameter, as high is the A.THD parameter, so a PF>0.99 could be a good sign for a low A.THD. Nevertheless, from case to case (especially when a noisy switching system is being used) the A.THD factor may reach an amount over 100%, even when the PF=0.85.
A high A.THD parameter may have very negative side effects in respect to the entire electrical system environment. The high frequency noise created by these harmonics could create serious perturbations (i.e., “static noise”, “parasite frequencies”) to all governmental or private communications lines, satellites, robotics, Internet, media, etc.
At this time, a “decent value” for this parameter is A.THD<20%. However, when the number amount of these high A.THD electrical devices increases into the tens of millions range, the cumulative noise generated in the environment may have catastrophic repercussions even when the A.THD per unit does not exceed 20%. By considering the amount of noisy devices already existing in the market, such as computers, printers/copiers, monitors/TVs, fluorescent lamps, industrial equipment, etc. and also by acknowledging that during the next 5 years it is anticipated for most of the existing (inefficient) light sources to be replaced with LED lamps (without PFC, some of these products may reach A.THD>90%), it is quite possible for these noisy devices to reach the hundreds of millions units amount in less than 3 years from now. To avoid this situation, an A.THD<5% per unit, would be more recommendable.
2.3.4 The Reliability (“Rel”)
The Rel factor relates to the anticipated lifetime of a product versus environmental variations (i.e., temperature, humidity, pressure, mechanical stress, vibrations, supply voltage, etc.) or versus the topology and parts used for that specific product's design.
Typically, linear (analog) devices are more reliable than the switching ones, however, the “Eff” issues force the designers to prefer mixed-signal topologies.
In “small signal” circuits (i.e., voltages less than 20V, currents less than 1 A), the switching devices are pretty reliable because the parts are not exposed to large variations of voltage and/or current and therefore, their working temperature is kept at a safe level. A large number of parts would decrease the reliability factor for the entire circuit (i.e., each part may fail independently, for whatever reason). However, integrating as many parts as possible into a single chip could resolve this inconvenience for such small signal circuits.
However, in “large signal” circuits (i.e., V>100V, I>5 A), all switching devices are exposed to very high and fast variation of voltage and current, a fact that considerably increases the parts' working temperature and risk of failure.
For solving these problems, besides a smart and reliable small signal controller circuit, many other items are required, such as soft start circuits, inrush current circuits, snubber circuits, high reliability buffers, high precision voltage references, voltage/current feedback circuits, etc. Also, circuit topology simplicity (i.e., less parts count) is a big plus for a good reliability.
2.3.5 The Cost Per Unit (“C/U”)
The C/U factor reflects, to some extend, the entire product's quality, in respect to all the main factors mentioned above, however, by applying new concepts, simplifying topologies and reducing the parts count in a circuit, the C/U factor can be substantially reduced, without sacrificing any of the important features which a state-of-the-art product has to offer to its end users.
2.4 Important Feature—Versatility
According to the industry records regarding the mixed signal chips manufactured in the largest volume, worldwide, the most common is the “555 Timer”, introduced by “Signetics, USA” over 25 years ago, and because of its over 300 applications, this timer/clock circuit is built, even now, in a volume exciding 1 Billion units/year.
This chip's internal block schematic diagram comprises just a few standard devices or functional blocks, namely: 2 Comparators, 1 Flip-Flop, 1 Driver, 1 Transistor and 3 Resistors. A key feature of this chip consists in the clever way those internal parts are coupled to each other and to the 8 I/O terminals (i.e., the system's topology), offering to designers easy access and hundreds of combinations to connect a few external parts to the 555 Timer chip for building their desired application, in the timers, clocks, analog logic or automation fields of industry.
The 555 Timer chip's versatility inspired many other chip designers and inventors worldwide, leading to the concept of the microprocessor, the only other (very sophisticated) chip capable of beating the 555 Timer in respect to the versatility aspect, but never in respect to its simple “8 Pin” configuration and low cost/unit features.
Therefore, there is a vital need for improved versatile mixed signal controller circuits capable of inexpensively managing/converting the electrical energy with higher efficiency, power factor and reliability, and with lower harmonic distortions.
3. The Related Art
During the last 30 years, the mixed signal controller systems are more and more used in the power management industry because of their performances/cost advantages over analog and digital circuits. Several prior related circuits are presented in this chapter for comparison purposes with the new controlling system (NEWSYS) that represents the present invention.
For an easier perception of the present invention's versatility, distinctive controlling capabilities and other merits, features or advantages that the present invention has or may have over the related art's similar systems or circuits, Comparison Notes will be attached at the end of each “classic” (i.e., well known) controlling system and/or circuit's description, presented below.
3.1 The “555 Timer” Block Schematic Circuit (FIG. 1)
FIG. 1 shows the internal block schematic diagram of a 555 timer integrated circuit (IC) that senses and/or controls the external circuit via 8 input/output electrodes, respectively: 1. GND, 2. Trigger, 3. Output (DRV), 4. Reset, 5. Control, 6. Threshold, 7. Discharge and 8. Vcc.
The 555 Timer device comprises one low voltage threshold voltage oscillating comparator (OCL) one high voltage threshold voltage oscillating comparator (OCL), one SR Latch (SRL), one Driver circuit (DRV), one discharging transistor (Td) and three equal value resistors (R1, R2, R3).
Despite its simplicity, this circuit is able to perform over 300 applications (see the Internet-related literature for the “555 Timer” circuit) in timers/clocks, analog logic and automations/robotics sections of the power management industry.
The main 3 typical circuits that create the means for most of the other 300 Applications of the “555 Timer” are the bistable, monostable and astable circuits, presented below.
Comparison Note: NEWSYS features a significantly more complex and reliable block schematic (see FIG. 19 for the NEWSYS apparatus block schematic embodiment and its related description).
3.1.1 The “555 Timer” Bistable Circuit (FIG. 2)
FIG. 2 shows a typical bistable circuit including a “555 Timer”, a 12V DC supply source, a setting resistor Rs, a resetting resistor Rr, a setting switch SwS, a resetting switch SwR, an anti-noise capacitor Cc and a 12V/100 mA incandescent bulb BI.
When SwS is pushed for a short period of time (i.e., “push button” switch), the pin 3 (DRV) of the “555 Timer” switches in its “High” stage (i.e., near 12V) and remains there until the other switch SwR (i.e., also “push button” switch), is pressed, for a short time.
The bulb BI lights during all the time when DRV is “High” so, in other words, this bistable circuit is a “one-bit memory” (i.e., analog logic) capable of keeping a load (i.e., a bulb, motor, heater, etc.) connected to its power supply source (via a Relay, MOSFET or Thyristor, when large power is required) for an indefinite time, until an operator, a mechanical device or electrical sensor (i.e., automation/robotic systems) activates SwR and switches OFF the entire circuit.
This bistable circuit has also a very large use in fast control systems used in automation/robotic circuits, because it eliminates one important disadvantage of the classic mechanical switches (i.e., “Push Buttons”, “Toggle Switches”, “Relay Contacts”, etc.) which, at each “ON” or “OFF” cycle, provide not just one pulse but actually a train of pulses which may “Start” and “Stop” several times, fast controlling circuits, at each time when a mechanical switch gets “ON” or “OFF”. This disadvantage can be successfully eliminated, by using one switch for the “ON” operation and another switch, for the “OFF” operation.
Comparison Note: The present inventions' bistable circuit solution comprises less parts (see FIG. 38, The NEWSYS Bistable Circuit Embodiment) and it is more reliable against time and temperature than the above presented solution, because NEWSYS comprises more reliable internal functional blocks, stabilized by a voltage gap reference which provides, 5.0V (Vref−pin 8) having 1% precision, despite large variations of temperature. (See FIG. 38: “The NEWSYS Bistable Circuit Embodiment” and its related Description.)
Important Observation: Inside of a 10-15 functional blocks mixed-signal chip, a voltage gap reference block takes less than 15% of the die size and therefore its cost, as an internal devices, is very low (i.e., about 10-15% of the chip's total manufacturing cost. However, as a separate device (chip) attached to a “555 Timer” system for improving the entire circuit's reliability, may cost as much as a “555 Timer” chip itself, because of the wafer cutting, packaging and test manufacturing operations, involved to each distinct product. On the other hand, a “555 Timer” chip including a voltage gap reference in its internal system's block schematic, will surely change its existing perfect topology, and dramatically altered, its versatility feature.
3.1.2 The “555 Timer” Monostable Circuit (FIG. 3)
FIG. 3 shows a typical monostable circuit including a “555 Timer”, a 12V DC supply source, a Setting resistor Rs, a Setting switch SwS, a filter compensation capacitor Cc, a Charging resistor Rch, a timing capacitor Ct and a 12V/100 mA bulb, BI.
When SwS is pushed for a short period of time, the pin 3 (DRV) of the “555 Timer” switches in its “High” stage and remains there for a limited time (i.e., from several milliseconds to several minutes) determined by Rch current and Ct charging time. The bulb Bl lights during the limited time when DRV is “High” so, in other words, this monostable circuit is a “Timer” capable of keeping a load connected to its power supply source for a precise pre-established time determined by the external parts Rch/Ct (i.e., designer's option).
This monostable circuit has, also, a very large field of applications in many automations/robotic systems, where each operation involves a “time frame” of execution. Also, it could be successfully used in energy saving circuit in which a lighting system or a heating and/or cooling system is supposed to work just for a limited time and eventually shut down automatically.
Comparison Note: The present invention's monostable circuit solution comprises fewer parts and is more precise and reliable in respect to the above-presented solution, because NEWSYS internal system architecture is more reliable against variations of the supply voltage and/or variations of the ambient temperature. (See FIG. 39: “The NEWSYS Monostable Circuit Embodiment” and its related Description).
3.1.3 The “555 Timer” Astable Circuit (FIG. 4)
FIG. 4 shows a typical astable circuit including a “555 Timer”, a 12V DC supply source, a Charging resistor Rch, a first Discharging resistor Rdch1, a second Discharging resistor Rdch2, a Discharging diode Ddch, a timing capacitor Ct, an “anti-noise” capacitor Cc and a 12V/100 mA incandescent bulb, BI.
When the 12V DC source is coupled at the Vcc and GND terminals, the capacitor Ct is charged with an electrical current incoming from Vcc (+) to GND (−) via Rch, Rdch and Ct. The controller's three (equal value) internal resistors coupled series from Vcc to GND provide two voltage reference to the inputs of the two comparators in such a way that the CS's reference input is set to a voltage in amount of about ⅓ of the Vcc amount and the CS's reference input is set to a voltage in amount of about ⅔ of the Vcc amount, in respect to GND (zero). During the period of time in which Ct is charged up to ⅔ of the Vcc voltage amount, the SRL's Q output is in HIGH state and its Q-bar output in LOW state so, in other words, BI is lighting and Td act as an OFF switch.
When Ct charging voltage exceeds the ⅔-voltage threshold, the SRL's outputs are triggered in opposite logic states so, now Td is switched ON and pin 3 (Output) is switched to its LOW state that shuts down BI's lighting.
When Td discharges Ct, via Rdch, down to a voltage amount lower than ⅓ of the Vcc voltage, the SRL's outputs are switched back in their initial states and the cycle is repeated indefinitely.
In other words, this entire circuit acts as a “Square Wave Oscillator”, a “Square Wave Generator”, a “Multivibrator”, and/or a “Clock” circuit, which is actually the most popular name for this kind of classic circuits.
This astable (clock) circuit is probably the most used application of the “555 Timer” circuit, since all automation/robotic systems need a clock for synchronizing the operations and the use of square wave signals is much more efficient (in respect to sine-waves) in monitoring/warning applications.
The main inconvenience of this application consists in the fact that the “555 Timer” cannot continuously provide duty cycle ratios ranging from 1% to 99%. Typically, the chip works only in the 50% to 99% range, and for lower duty cycle, a diode (Dch) has to be attached to the system.
Comparison Note: The present invention's astable (clock) circuit solution comprises less parts and is more precise and reliable in respect to the above presented solution, because NEWSYS internal system architecture is more reliable against variations of the supply voltage and/or variations of the ambient temperature. (See FIG. 40: “The NEWSYS Astable Circuit Embodiment” and its related Description.)
Additionally, the NEWSYS Astable (Clock) Circuit has the capability to provide duty cycle ratios from less than 1% up to over 99%, continuously (i.e., no need to attach a diode or modify the System), via a potentiometer or in feedback with a sensed voltage and/or current (i.e., state-of-the-art PWM System).
3.1.3 The “555 Timer” Intruder Alarm Application (FIG. 5)
FIG. 5 shows a typical “complex” application of the “555 Timer”, namely an “Automotive Intruder Alarm” circuit that includes a 12V DC supply source (the car's battery), two “555 Timer” controller ICs, 3 transistors, 12 resistors, 5 Capacitors, 2 Diodes, one Relay and a mechanical switch.
This alarm circuit does a similar job of a very simple digital microcontroller used in automation/robotics circuits, respectively it runs 2 consecutive operations in a specific order and in accordance to a pre-established time schedule (i.e., two monostable circuits connected together, for pre-setting the time of each operation):
1. Activates the alarm (the car's horn and lights) within 13 seconds since one of the car's door (or window) is opened if “the secret resetting switch” (hidden by the car's owner) is not activated during that time, and
2. Deactivates the alarm after 1 and ½ minutes, assuming “the intruder” left, shortly after the alarm started.
This is just a simple example of how a “555 Timer” could be used in automations/robotics circuit applications.
Comparison Note: The present invention's intruder alarm circuit solution comprises less parts, is able to provide, simultaneously 3 Timing Operations (i.e., NEWSYS can replace up to three “555 Timers” circuits) and is more precise and reliable in respect to the above presented solution, because NEWSYS internal system architecture is more reliable against variations of the supply voltage and/or variations of the ambient temperature. (See FIG. 41, The NEWSYS Intruder Alarm Circuit Embodiment.)
Additionally, the NEWSYS intruder alarm circuit solution is able to protect as many doors or windows as needed (i.e., a huge building), with minimum extra cost (i.e., just one switch one diode and one resistor/door).
3.2 Pulse Width Modulation (PWM) Circuits
The PWM circuits are now more and more used in Boost, Buck or Buck-Boost AC/DC-DC/DC converter, flyback, power factor correction, light control, motor control, temperature control, and battery chargers' control circuits, because of their high efficiency.
These circuits include, typically:                a) a “Large Signal” (typically V>100V, I>5 A) sub-circuit, comprising high voltage/current inductors (coils), diodes, capacitors, resistors, and “buffers” (i.e., MOSFETs, IGBT's, bipolar transistors, thyristors, triacs, etc.), and        b) a “Small Signal” sub-circuit (typically V<20V, I<1 A), comprising a Controller IC (chip) and several low power, diodes, resistors, capacitors, transistors, op-amps, comparators, opto-couplers etc. that connects the controller chip, to the “Large Signal” sub-circuit.        
The PWM control could be performed using different techniques, such as “Voltage Mode” or “Current Mode”, “Fixed Frequency” or “Variable Fervency”, and “Continuous Mode” or “Discontinuous Mode” of operations, in order to reach an optimum cost vs. performance compromise. Therefore, the PWM controller circuits industry includes many “types” and/or “families” of controller ICs, designed for specific applications. Some of these circuits are describe below, for comparison purposes.
Comparison Note: NEWSYS field of applications include boost, buck or buck-boost AC/DC-DC/DC converter, flyback, power factor correction, light control, motor control, temperature control, battery chargers control, and many others that none of the existing PWM Controllers could perform with less external parts, being capable to drive any kind of buffers, such as: MOSFETs, IGBT's, bipolar transistors, thyristors, triacs, etc.
Additionally, NEWSYS internal topology and pin-out configuration allow for the use of any of the above PWM control technique, such as: “Voltage Mode” or “Current Mode”, “Fix Frequency” or “Variable Fervency”, “Continuous Mode” or “Discontinuous Mode” of operations.
(See all NEWSYS PWM Application Embodiments and the related descriptions.)
3.2.1 The Voltage Mode Control Systems (FIG. 6)
FIG. 6 shows a voltage-mode PWM system comprising:                A “Large Signal” sub-circuit including in a buffer NPN transistor, having a Rsense resistor included in its emitter circuit, a high frequency transformer, two rectifier diodes, a filtrating coil and a filtrating capacitor, included in the buffer's collector circuit, and        A “Small Signal” sub-circuits such as an error amplifier, a PWM comparator, an oscillator/clock, a voltage ramp capacitor and an SR (Set-Reset) latch.As the voltage/time graph attached at the bottom of FIG. 6 shows, the voltage-mode PWM control technique works as following:            I. The oscillator block generates, simultaneously, a saw tooth voltage ramp signal (created via the voltage ramp capacitor) at one input of the PWM comparator and a rectangular clock signal at the set (S) input of the SR latch, synchronized in such a manner for the clock pulse to last just for the (relatively) short period of time when the voltage ramp pulse decays, from its maximum to its minimum amplitude value.    II. As soon as the set pulse ends (i.e., turns to the “LOW” logic state), the SRL output (Q) turns “HIGH” and activates the NPN buffer, which acts as an “ON” switch in the circuit of the inductor (i.e., the primary section of the high frequency transformer), which starts accumulating electrical energy.    III. When the voltage ramp signal amplitude reaches the amount of voltage delivered by the error amplifier's output, at the other input of the PWM comparator, “Vo”, the Comparator's output reverses its logic state, resets the RS latch and turns OFF the NPN buffer.    IV. The inductor is “released” from the NPN buffer's circuit and is able to discharge the accumulated electrical energy in the secondary section of the high frequency transformer, which delivers the energy to Vout via one diode, the filtrating coil and the filtrating capacitor.    V. When the next set pulse is generated, another inductor's charging cycle is executed.
Generically, the PWM (pulse width modulation) technique relates to the capability of the controller circuit to modulate the pulse “ON” versus “OFF” time period (i.e., the duty cycle) in such a manner that the Vout remains constant in amplitude, despite large variations of the load current and/or supply voltage. (Vout amount is proportional to the duty cycle ratio.)
In the “Voltage Mode” control situation, the feedback with the load voltage (Vout) is made by the error amplifier, only, (i.e., no current feedback from Rsense) which, via its two inputs, senses the Vout amount in comparison with a precise reference voltage and adjusts its output voltage in such a manner, to increase the latch output pulse “ON” time (i.e., increasing the duty cycle) if Vout is lower than a pre-established value (i.e., in respect to the reference voltage), and, vice versa, to decrease the latch output “ON” time (i.e., decreasing the duty cycle) when Vout amount raises over the reference voltage amount.
The voltage-mode PWM systems offer several advantages such as good stability, smaller inductor size and lower cost, for converters up to 200 W output power.
The main disadvantages are slower feedback speed, higher peak current in the inductor and buffer, and, implicitly, lower efficiency in respect to other solution.
Comparison Note: NEWSYS' includes in its internal topology all the above-mentioned functional blocks, plus many more, for performing voltage-mode PWM control operations.
Additionally, NEWSYS is able to eliminate the above-mentioned disadvantages of a typical voltage-mode PWM system, being able to control large signal systems in an optimized voltage/current mode combination technique.
5.2 Current Mode Control Systems (FIG. 7)
FIG. 7 shows a current-mode PWM system having about the same configuration and comprising about the same parts, except the voltage ramp capacitor, which is not needed in this system, since the lower input of the PWM comparator is connected directly to the NPN buffer's emitter.
The error amplifier is doing the same feedback job in respect to Vout, however now, the controller is able to sense not just the output voltage, but also the current delivered to the load.
As the voltage/time graph attached at the bottom of the FIG. 7 shows, the current-mode PWM control uses the same technique in which a set pulse coming from the oscillator/clock activates (via the SR Latch) the NPN buffer, for a time period and then a reset pulse, commixing from the PWM comparator (via the same SR latch) des-activates the buffer, for another period of time.
The main difference in respect to the voltage-mode system consists in the fact that now the PWM comparator is sensing, directly, the inductor current (via the NPN Bbffer and the Rsense), so in other words, the controller is able to immediately read pulls by pulsing the maximum current in the inductor and to deactivate the NPN buffer at any time when the current reaches an amount higher than a pre-established amount.
This technique allows for continuous mode of operation with higher duty cycle ratio, lower peak current in the inductor and buffer, and implicitly allows for a better efficiency. Thus, current-mode PWM systems offer significant advantages in respect to the feedback and control speed and efficiency factors.
The disadvantages list includes less stability, larger inductor and higher total cost/solution.
Modern systems are using kind of combination between the to above presented systems, by overlapping a fraction of the oscillator Voltage Ramp signal over the current sense signal (see FIG. 9: the voltage ramp buffer circuit including Qvr, Rvr1, Rvr2), a fact which increases the current-mode system stability.
Comparison Note: NEWSYS' includes in its internal topology all the above-mentioned functional blocks (plus many more) for performing current-mode PWM control operations.
Additionally, NEWSYS is able to eliminate the above-mentioned disadvantages of a typical current-mode PWM system, being able to control large signal systems in an optimized “Voltage/Current—Discontinuous/Continuous” mode combination technique.
6. The UC384x Block Schematic (FIG. 8)
FIG. 8 shows the circuit blocks of probably the most “classic” PWM current controller in the industry, the UC3842, that belongs the UCx84x current-mode PWM controller series (family), introduced by Unitrode (USA) (now Texas Instruments) over 20 years ago.
This very popular fixed-frequency current-mode PWM integrated circuit is still built in very large volume by over 100 major manufacturers worldwide (including TI, Motorola, ST, ON Semiconductor, Fairchild, Micrel, etc.), because of its simplicity, decent performances and low cost.
The “UCx84x controller ICs family includes the UC1832/345, the UC2842/3/4/5 and the UC3842/3/4/5. All these controllers have, basically, the same internal block schematic topology, as shown in FIG. 8, however there are some minor differences in their behavior, respectively the UC184x and UC284x feature less current consumption, the UCx842/4 have a UVLO hysteresis that allows them to start operating at 16V and cease operating at 10V, while the UCx843/5 start operating at about 8.6V and cease operating when their supply voltage drop down to less than 7.8V.
The UC3842 (representative for the UC384x controller IC family) comprises 8 functional blocks included in the controller series are the (1) under-voltage lock-out (UVLO), the (2) voltage references and internal biasing (VRIB), the (3) driver (DRV), the (4) pulse width modulation Logic (PWML), the (5) error amplifier (EA), the (6) voltage limiter (VL), (7) pulse width modulation comparator (PWMC), and the oscillator (OSC) block.
Eight I/O electrodes: Comp (1), Vfb (2), Is (3), RtCt (4), GND (5), Output (6), Vc (7) and REF (8) are connecting the internal functional blocks to the controller's related circuit.
Comparison Note: For compatibility reasons, NEWSYS' has been designed with the same “Pin-Out” topology and comprises all the UC3842 eight internal functional blocks (some of them upgraded, internally), in order for NEWSYS to be able to perform the typical fixed-frequency PWM current-mode applications featuring better performances, while substantially reducing the related external circuit's parts count (9-15 parts) and also, the entire solution's size and cost.
However, the internal system block schematic topology has been substantially modified and/or upgraded, by inserting 4 more functional blocks, and accordingly changing the blocks interconnection topology, in order for the NEWSYS to be able to perform not just as a fixed-frequency current-mode PWM controller, but also as any of a variable-frequency current-mode PWM controller, a timer/clock circuit, a fixed/variable-frequency PFC controller circuit, a thyristor (SCR) controller circuit, a “Benistor” controller circuit, and/or a ZVD controller circuit, etc. (See FIG. 19, “The NEWSYS Circuit Block Schematic Embodiment” and its related description.)
6.2 The UC384x Typical AC/DC Converter (FIG. 9)
FIG. 9 shows a typical UC384x AC/DC boost converter schematic comprising a large-signal sub-circuit and a small-signal sub-circuit.
The large-signal sub-circuit, comprises: an input voltage supply unit including an electromagnetic interference filter (EMI), a bridge rectifier (BR) and 2 input filtrating capacitors (C1, C2), a high frequency transformer (Tr), a MOSFET transistor (M), a sense resistor (Rsense), a snubber circuit comprising a capacitor (Cs), a diode (Ds) and a resistor (Rs), a high voltage fast diode (Do), an output filtrating capacitor (C3) and a load resistor (Rl).
The small-signal sub-circuit comprises: a UC384x controller IC, a starting resistor (Rst), a DC supply circuit (connected to the Tr secondary coil) comprising a low voltage diode (Dsu) and a small voltage capacitor (Csu), a driving resistor (Rdrv), a current spike filter including a resistor (Ris) and a capacitor (Cis), a timing RC circuit a resistor (Rt) and a capacitor (Ct), a Voltage Ramp Driver Circuit including a NPN Transistor (Qvr) and two resistors (Rvr1, Rvr2), two feedback resistors (Rfb1, Rfb2), a compensation filter including a capacitor (Cc) and a resistor (Rc), a low voltage filtrating capacitor (Cr) and a soft start circuit including a transistor (Qss), a capacitor (Css) a resistor (Rss) and a diode (Dss).
The circuit operates in a classic boost fixed-frequency current mode, providing a stabilized voltage of about 400 VDC, across the load resistor Rl, despite the large variations (i.e., in off-line circuits, 85 Vrms-265 Vrms) of the un-stabilized input voltage, which is rectified by BR and filtrated by a bulk capacitor CF2 (about 100 uF per each 100 w input power).
The EMI block and Cf1 (100-220 nF, typically) help for attenuating (i.e., stopping most of them from going back into the 50-60 Hz electrical line) the high frequency harmonics incoming from the high power boost switching system.
The primary coil of the high frequency transformer TR acts as typical boost inductor, which for each of the MOSFET (M) buffer's switching cycle, stores electrical energy for a period of time (i.e., during the M switch “ON” time) and then releases this energy (i.e., during the M switch “OFF” time) to the load, Rl, circuit, via Do, where the output bulk capacitor Cf3 (about the same value as Cf2) stores it, until the next high frequency cycle.
A part of the inductor's electrical energy is collected by the Tr secondary coil, for supplying the controller with DC voltage, via Dsu and Csu.
The Cs, Ds, Rs circuit is a classic “Snubber” that keeps the MOSFET buffer “cool”, since a low operating temperature is more safe and also, the MOSFET's aluminum heat sink could be substantially reduced, when large power is converted.
During the high power switching process, without snubbers, the MOSFET buffer's has to dissipate a huge power (over 1 kW) for a very short period of time, when M switches “OFF” and the inductor reverses its polarity, pushing the MOSFET's drain/source voltage up to 400V in almost no time.
When a MOSFET transistor drain-source current reaches an amount of 5 A peak and is shut down from its gate by the controller's driver, it needs at least 80-100 nS (unless is a very fast and expensive one) for its current to decay to 0 A. If the inductor force pushed it very fast to the load's voltage, then during that short time its dissipation will be 5 A×400V=2 kW, a fact that slowly, the transistor working temperature may increase to a dangerous level.
The snubber circuit's capacitor Cs creates a short delay in the MOSFET's drain's ascending speed, however it gives enough time to the MOSFET's drain-source current and its momentarily high power dissipation, to decrease considerably.
The main inconvenience of this type of snubber consists in the fact that a diode, Ds, and a resistor Rs have to be included in this snubber circuit for Cs to discharge its accumulated electrical energy not back into the MOSFET drain-source circuit, but into Rs, via Ds.
In other words, the electrical energy lost in Rs is the “sacrifice” designers have to accept, for cooling down the MOSFET and decrease its, voluminous, heat sink.
The MOSFET buffer, M, is switched, periodically by the PWM controller circuit, in such a manner, that when the voltage across the load Rl, exceeds a pre-established limit, the feedback resistive divider, Rfb1, Rfb2 provides an increasing voltage in the controller's EAin (pin 2) input and when this voltage exceeds 2.5V, the error amplifier's output, EAout (pin 1) starts lowering its voltage, forcing the PWM Comparator block to decrease the DRV's output signal duty cycle, until the voltage across Rl is balanced and slowly stabilizes at the pre-established value, determined by the Rfb1, Rfb2 ratio.
The Rt, Ct circuit are setting the controller's internal oscillator frequency in a classic fashion, similarly to the “555 Timer” oscillating operations, except the fact that UC384x has precise voltage references and constant current sink discharge capabilities.
Rsense, (typically 0.1-1 ohm) provides small voltage to the controller current sense Is (pin 3) terminal, direct proportional to the momentary current value amount crossing the Mosfet M, via a current spikes filter circuit, Ris, Cis. This filter is needed, to eliminate an over 1V short (about 100 nS) spike attached to the “leading edge” of each pulse (mostly in the continuous current-mode applications), which may shut down, prematurely, the controller's driving output signal.
The voltage ramp driver circuit, comprising Qvr, Rvr1 and Rvr2 that buffers the Osc (pin 4) signal to Is (pin 3) provide allows the UC384x to work in voltage mode of operations, or by adding the OSC voltage signal to the current signal incoming from Rsense, creates a “slope compensation” which increase the stability of the system, in current mode of operations.
The soft start circuit, comprising Qss, Rss, Css and Dss forces the EAout (pin 1) terminal to raise its voltage smooth, since the voltage amount of this terminal is direct proportional with the DRV's output signal duty cycle and, implicitly, with the voltage across Rl.
Cr filtrates Vref DC voltage.
The Vref electrode, after receiving validation from the UVLO block, supplies with very precise 5.0 Vdc all the small-signal external circuit related to the controller. When Vref (pin 8) is active (i.e., delivers 5.0 V) it charges, softly, Css, via Rs (typically 10 mS, with Rss=1M and Css−10n). However, when it shuts down, it acts as a switch to GND and discharges (resets), rapidly, Css.
The UC384x is a low cost and pretty versatile current-mode PWM controller circuit capable of performing, with decent performances, many applications in the power management field of industry, respectively high frequency converters, such as: flyback, boost, buck and buck-boost, operating in fixed-frequency, current mode or voltage mode with external voltage ramp driver), continuous current or discontinuous current mode system design.
Limitations/disadvantages of this controller circuit are: it operates only in fixed-frequency, it may “skip” pulses or is unable to deliver low duty cycle ratio pulses, i.e., (1-5%) in voltage mode or slope compensation applications and, in complex applications it request an external voltage ramp driver circuit, an external soft start circuit and an external current spike filter, all circuits which unnecessarily increase the parts count, size and cost of the entire solution.
Comparison Note: NEWSYS comprises all the UC384x internal functional blocks, plus several novel functional blocks (see FIG. 19, “The NEWSYS Circuit Block Schematic Embodiment”) that allows for higher performances (does not skip pulses, but oppositely, it is capable of delivering short pulses at even less than 1% duty cycle), higher precision reliability, by using OPAM as internal voltage ramp driver, has more internal protections, faster shut-down control systems and offers a much larger field of applications.
As a big benefit, NEWSYS offers the same “8 pin-out” topology as the UC3846, however, it eliminates the need for several frequently use external circuits such as voltage ramp driver (3 parts), soft start (4 parts) and current spike filter (2 parts), a fact that substantially reduces the external parts count (a total of at least 9 parts, without considering the extra parts used internally, for upgrading purposes), the circuit size and the total solution cost and reliability.
Additionally, because of its remarkable versatility, by controlling a boost converter system pretty similar to the one presented above, the NEWSYS is capable of performing the exact same job as the UC3842 (i.e., comprising all the UC3842's internal functional blocks and a few novel ones) with less external parts count, higher efficiency, because of a more efficient snubber circuit and power factor near unity (i.e., PF=0.999). (See FIG. 48: “The NEWSYS PFC AC/DC Boost Converter Embodiment” and its related descriptions.)
7. Power Factor Correction Circuits
All existing electronic devices (such as computers, TV sets, monitors, stereos, industrial equipment, medical equipment, etc.) require an internal DC voltage supply, obtained by converting the AC current available from the standard 120-240V/50-60 Hz power line. In order to perform this AC/DC conversion, in most of the cases a low cost circuit comprising a bridge rectifier and a relatively large value (100-470 uF) bulk capacitor are used, typically.
Because the bulk capacitor is a “reactive device” which acts as an electrical energy storage device, after a few cycles, the voltage across the capacitor remains at a high DC value amount, slightly lower than the picked input voltage. As a result of this charge storage property, the capacitor re-charges periodically only for a short part of the AC cycle, when the momentary AC voltage amount exceeds the capacitor voltage amount (the rectifier bridge's diodes are direct polarized) and stops charging just as the AC voltage reaches its maximum peak value and the rectifier bridge's diodes start being reversed polarized.
As a negative result, the circuit current shape becomes a sharp pulse looking more like a triangle than a sine wave, which lasts only about 2 mS from the total period of about 8.33 mS of a 60 Hz sine wave generator's half cycle, the peak current in the circuit must be now higher for delivering the same power in shorter time, a fact that results in a higher RMS current amount, lowering the PF parameter considerable less than 1 (typically 0.65 for computers, monitors, printers, etc.).
Even worse, since it is well known that any current shape, except perfect sine waves (which are virtually impossible to be obtain), generates a large amount of noisy harmonics that may create serious perturbations to a lot of sensible pieces of equipments such as telecommunications devices, medical equipment and/or high precision industrial robots.
Because of all these above, the electrical utilities (the high power transformers as well as the wiring circuit's size are calculated proportional to the RMS current's amount) must employ, unnecessarily, much more generating and distributing capacity.
Therefore, since the energy conservation is the most important problem at the planetary level and, on the other hand, near unity (i.e., PF=0.999) power factor correction devices have been already proven to be real and reliable at the industrial level, from now on there is not just a vital need, but also a duty to resolve the PFC and THD issues rapidly, economically and efficiently.
8.2 The MC33260 (FIG. 10)
FIG. 10 illustrates the MC33260 circuit, as a classic ON Semiconductor's low cost 80 W PFC solution to be used for florescent bulb ballast applications, featuring the following:0.967<PF<0.996 7.0%<A−THD<18.8%90.2%<Eff<95.7% $/IC=0.84
As FIG. 10 shows, the MC33260 PFC circuit, buffered by a high power MOSFET transistor (MTP4N50E) has been introduced between the bridge rectifier (i.e., 4×1N4007 rectifier diodes) and the bulk capacitor (C2=47 uF/450V) with the purpose for the generator (i.e., the AC electrical line) to do not “feel” the reactance (i.e., the non-linear behavior mentioned above) of the bulk capacitor. The C1 (330 nF/500V) has a too small value for affecting, significantly, the generator's sine-wave current shape and reduce the PF parameter.
Similarly to the boost converter circuit's behavior, fully described above, after several high frequency oscillating cycles, the oscillating inductor L1 (320 uH) (charged, periodically by Q1) will charge C2, via D5 (MUR460E) to an amount of voltage higher than the maximum Vin, a fact that will allow the PWM controller IC (MC33260) to modulate, pulse by pulse (in high frequency) the entire circuit's current shape, pretty similar to the generator's voltage shape, respectively a sine wave. That correction improves the power factor and decreases the THD parameters in accordance to the chart shown at the bottom section of FIG. 10.
The internal architecture of the MC33260 PFC controller is pretty similar to the UC384x PWM controller, both circuits comprising an oscillator block, a feedback (error) amplifier block, a UVLO block, a PWMC block, a PWML block, an output buffer block, etc. However, despite the fact that does not include a “classic multiplier” block (a relatively expensive sub-circuit, included in most of the PFC controller ICs' internal topography), the MC33260 has several different functional blocks that are not included in the UC384x block schematic, and, of course, because of that, each chip has different pin-out configuration and applications.
No multiplier, lower inductor (320 uH), lower size and lower solution cost, represent the main advantages that made this solution very popular in the existing large volume market.
The disadvantages of the MC33260 PFC present circuit solution are: lower performances, variable operation frequency (higher EMI noise) and variable voltage delivered to the load (i.e., from 181V up to 392V).
Comparison Note: NEWSYS also does not comprise an expensive multiplier block, but is capable to perform PFC operations in variable frequency mode and is also capable of working in “voltage-follower” mode (i.e., variable voltage delivered to the load, increasing proportionally with the input voltage, for higher efficiency at low input voltage) when designers prefer that specific configuration.
Additionally, NEWSYS is capable to provide fixed-frequency, fixed-load voltage (400V) PFC solutions with better performances (PF=0.994-0.999, A.THD=1.9%-7%, Eff=90%-96%) and lower cost/unit (about 45 c/IC)
(See FIG. 48: “The NEWSYS PFC AC/DC Boost Converter Embodiment” and the related description and charts.)
8.3 The MC33368 (FIG. 11)
FIG. 11 illustrates the MC33368 circuit, as a classic ON Semiconductor's high performances 180 W PFC solution, featuring the following:0.972<PF<0.997 0.6%<A−THD<5.8%92.2%<Eff<96.8% $/IC=1.64.
As FIG. 11 shows, the MC33260 PFC circuit is more powerful, buffered by a higher power MOSFET transistor (MTW20N50E) which has been also introduced between the bridge rectifier (i.e., 4×1N5406 higher current rectifier diodes) and the bulk capacitor (C2=330 uF) with the purpose for the generator (i.e., the AC electrical line) to do not “feel” the reactance (i.e., the non-linear behavior mentioned above) of the Bulk Capacitor. This circuit works in a classic fashion: the multiplier sub-circuit included in the MC33360 internal topography modulates, in high frequency pulses, the entire circuit current, reaching almost a perfect sine-wave (see PF=0.997 in the attached chart).
There are some similarities between the internal architecture of the MC33368 PFC controller and the UC384x PWM controller, however the MC3368 has many different functional block which are not included in the UC384x block schematic, and, of course, because of that, the two chips have different pin-out configuration and applications.
The main advantage of the MC33260 PFC circuit solution is: Excellent performances that reach the highest level in the industry.
The disadvantages of the MC33260 PFC circuit solution are: Cost/chip about double than the previous one, more parts count (25), larger size of the oscillating inductor (L1=720 uH) and, implicitly, larger size and higher cost/solution.
These factors are incompatible with the immediately needs of the large volume/affordable cost market that targets to replace, shortly millions of computers, monitors, printers and all the other electrical Devices with more efficient ones, for saving at leas the significant amount of electrical energy which is wasted now in unneeded overheat.
Comparison Note: NEWSYS is capable of controlling PFC circuits having about the same performances (PF=0.994-0.999, A.THD=1.9%-7%, Eff=90%-96%), but under lower cost/IC (about 45 c). Additionally, the entire system has less parts count, smaller size and total solution cost.
(See FIG. 48: “The NEWSYS PFC AC/DC Boost Converter Embodiment” and the related description and charts.)
9. The PCSD Conversion System (FIGS. 12 and 13)
The Parallel Charge-Series Discharge (PCSD) power conversion method has been introduced by Acatrinei (same author) in the U.S. Pat. No. 6,465,990 (Power Factor Correction Circuit—Oct. 15, 2002) as a highly efficient way of converting the electrical energy with Near Unity Power Factor and Low Harmonic Distortions.
FIG. 12 illustrates a typical minimum-parts PCSD Boost Converter System.
FIG. 13 illustrates a PCSD Voltage Doubler Boost Converter System, which uses the same concept, however, it is very efficient at small input AC voltage (i.e., 85-120 Vrms), being able to deliver up to 1 KW output power, with PF>0.99 and A.THD<5%.
At that time (2001), the PCSD concept has been successfully proven by using a “555 Timer” chip as a controller device (i.e., the first Apparatus Prototype), however that circuit had many limitations because it does not include in its internal architecture several important functional block required in the PWM/PFC applications, such as the Error Amplifier, the UVLO, the PWMC, the PWML, fast/high power DRV circuit, etc.
Comparison Note: NEWSYS is capable to control all PCSD PFC circuits, cost effectively and with high performances (PF=0.994-0.999, A.THD=1.9%-7%, Eff=90%-96%).
Additionally, the NEWSYS complexity in respect to the “555 Timer” controller allows for a more safe and reliable PCSD application circuit.
(See FIG. 48: “The NEWSYS PFC AC/DC Boost Converter Embodiment” and the related description and charts.)
10.1 The SCR's Control Circuit (FIGS. 14 and 15A-15C)
The Thyristor (or Silicon Control Rectifier—SCR), having three electrodes such as Anode, Cathode and Gate, is still the most powerful device ever created in the Power Management industry, because its “avalanche” (i.e., simply presented, a kind of “ignition” that push its junctions to complete saturation) capability allows it to switch ON-OFF currents of hundreds Amperes, beyond all the other high power devices (i.e., MOSFETs, IGBTs and Triacs) capability.
However, a disadvantage of its “avalanche” feature consist in the fact that a high power Thyristor (there are some bi-operational small power Thyristors) could be just “Turned ON” from its gate and after that it will remain in ON state (no matter the voltage in its gate) until its external anodic current is interrupted, for a short period of time.
Therefore in most of their applications, the Thyristors anodic circuit is supplied not with “filtrated DC” but with “un-filtrated DC” voltage, incoming directly (i.e., no filtrating bulk capacitor) from a high power Bridge Rectifier (see FIG. 15A, Vin), and therefore Thyristor gate's control is more sophisticated than a transistor's control.
FIG. 14 shows a typical SCR's (Thyristor's) control circuit schematic diagram comprising an alternative current generator Vac, a bridge rectifier BR, a “zero volts” resistor Rz, a Control Pulse Generator CPG, a Phase Control Circuit (FCC), a Multiple Pulses Driver, a Thyristor SCR and a bulb BI.
The Typical SCR's Control Circuit shown in FIG. 14 refers to a light control system (dimmer) in which the Thyristor is able to adjust, smoothly, the light intensity of the bulb, from 0 to its maximum lighting power, by receiving a control pulse in its gate, at the right moment in respect to the Vac supply pulse. In other words, since the Thyristor is turned ON with a short pulse in the gate and after that it will remain ON (i.e., acting as a fast ON switch for BI) until the 50-60 Hz supply bridge rectified wave reached it's next OV level, if the gate control pulse is delivered at the beginning of the rectified wave, BI will be supplied during the entire wave time (i.e., receiving the hole power) and if the gate control pulse is delivered at the middle of the wave, BI will be supplied just with half of the power and its light intensity will be also half. Therefore, by synchronizing the CPG short pulses with the moment when the Vac wave reaches OV and then by controlling the phase with a phase control circuit, from 0 to 180 degrees (i.e., half of a sine wave), the Thyristor could be turned ON at any time, in respect to the rectified supply wave, and by using a potentiometer, the BI lighting intensity can be adjust, from 0 to its maxim power, with a precision of 180 increments. FIG. 15B (Gate Pulse) and FIG. 15C (Vout SCR) show the Gate and Anode signal for 10 increments in which the power in the BI bulb is smoothly decrease, from the “hole half wave” down to zero. Rz is included in the circuit for making sure that the high power diodes, included in BR are biased and the rectified wave decays near OV (for being able to sense the “zero cross” moment and synchronize the CPG signal), because until the Thyristor turns ON there is no load (and no current) for the Bridge Rectifier. For the same reason, the large power Tyristors are turned ON with Multiple Pulses Drivers, because the Thyristor may shut down if after receiving just one short pulse, its anodic current is not large enough for maintaining its self-sustaining “avalanche”.
Comparison Note: NEWSYS is capable to control Thyristors in the necessarily 0-180 degrees range, in cost effectible and reliable circuit solutions.
Additionally, NEWSYS is capable to control even Transistor, in a “Thyristor” way, respectively, by switching the Buffer Transistor ON at any time, however always resetting (switching OFF) the Buffer Transistor at the very next “Zero Cross” moment (i.e., the moment when the sine wave decay near 0V.
(See FIG. 44, FIG. 47 and the related descriptions and charts.)
10.1 The ZVD Control Circuit (FIGS. 15D-15E)
A particularly way of controlling the electrical energy from a generator to a load is the “ZVD” (Zero Voltage Drive or Zero Voltage Switching “ZVS”) mode that offers, besides very good efficiency, almost “No Switching Loss and/or Noise”.
This method is ideal for controlling the heaters' power, because heaters are capable to “store heat” for a relatively long period of time and do not request fast switching speed.
The method consists in switching ON or OFF the power control device (Buffer) only when the Vac wave crosses its zero voltage line, providing to the heater either the “hole power wave” (i.e., half of a sine wave, after bridge rectifying) or “no power wave” in a relatively slow feedback (i.e., seconds or minutes) that can keep, constant the temperature, in a room, or in a cooking oven, or in a molding plastic oven, etc.
The Thyristor is an ideal control device for this application, because it is capable to turn itself OFF at the end of each Vac power wave semi-cycle.
FIG. 15D (Gate Pulse) and FIG. 15E (Vout ZVD) show the Gate and Anode signals in a ZVD circuit control application.
However, for small and medium power, buffers such as Bipolar, MOSFET and IGBT transistors could offer even better efficiency under lower size and cost.
Comparison Note: NEWSYS is an ideal controller circuit for these kinds of applications, being capable to drive, in a ZVD mode of operations, not just Thyristors but Bipolar, MOSFET and IGBT transistors, as well. (See FIG. 45, FIG. 47 and the related descriptions and charts.)
11. The Benistor (FIGS. 16 and 17A-17G)
The “Benistor” has been introduced by Acatrinei (same author) in the U.S. Pat. No. 5,903,140 (Low Dissipation Controllable Electron Valve—May 11, 1999 and has obtained a “Cover Story” appreciation from the Electronic Design Magazine of Jun. 6, 1998) as an extremely versatile “Controllable Electron Valve” having separate control electrodes for effective voltage control (EVC), for maxim voltage control (MVC), for positive phase current (CC+) and for negative phase current (CC).
FIG. 16 illustrates the Benistor Test Fixture Diagram comprising, primarily, an alternative current generator Vac, a Bridge Rectifier BR, a rectifier diode Dr, a filtrating capacitor Cf, a Benistor circuit, a bulb Bl and several switches and capacitors included in all the Benistor's I/O terminals, for capabilities test and demo purposes.
This device is actually an analog signal processor, able process a given input signal, change its shape or modulating it with sine waves, triangular or square waves.
By changing the setting of the five switches and four potentiometers, the Benistor is able to generate waves of infinite combinations.
In FIGS. 17B-17G have been selected just several waveforms, having applications in the Power Management industry, that the Benistor is able to process at its Vout electrode, having just a rectified sine wave inputted at its Vin electrode.
FIG. 17A (Vin) shows the Bridge Rectified power wave inputted at Vin.
FIG. 17B (PWM) shows that the Benistor is capable to process a rectified sine wave by outputting a square wave that is perfectly synchronized with the original wave and located, consistently, in the middle of the rectified sine wave. Applications: PWM, Peak Detector, A/D interface.
FIG. 17C (SCR) shows that the Benistor is capable to process a rectified sine wave by outputting a “Thyristor Control” wave which is perfectly synchronized with the original wave. Applications: Low/Medium Power Thyristors' application.
FIG. 17D (RSCR) shows that the Benistor is capable to process a rectified sine wave by outputting a “Reverse-Thyristor Control” wave that is perfectly synchronized with the original wave. Applications: Replacing Thyristors in applications where there is a need for a “smooth start”.
FIG. 17E (EVC) shows that the Benistor is capable to process a rectified sine wave by outputting a “Effective Voltage Control” wave which is perfectly synchronized with the original wave and located, consistently, in the middle of the rectified sine wave. Applications: AC-PWM, Peak Detector, Motor RPM Control.
FIG. 17F (MVC) shows that the Benistor is capable to process a rectified sine wave by outputting a “Maxim Voltage Control” wave which is perfectly synchronized with the original wave and located, consistently, in the middle of the rectified sine wave. Applications: AC-PWM, Light Control, Replacing Thyristor in Low/Med Power Applications.
FIG. 17G (ZVD) shows that the Benistor is capable to perform as a controller for ZVD circuit applications.
Comparison Note: NEWSYS is capable to perform all Benistor's “Stitching and Self-switching” mode of operation applications (i.e., reaching al the current/voltage graphs shapes shown in FIG. 17).
Additionally, NEWSYS internal system architecture is much more complex than the Benistor's one (i.e., the Benistor has been design to be just a simple “valve” like a “multi-terminals transistor, included in future IC systems) which allows for less external parts, smaller size and lower cost in most of the “complex circuits”, which may require 10-20 Benistors, for performing, safely, the same job.
Therefore, a need exists for an Low Cost Ultra Versatile Mixed Signal Controller Circuit which is affordable, reliable, efficient, low sized, simple in design, allows for less external parts, is capable to perform all the applications presented above and additionally, many more applications that none of the above presented devices is capable to perform.